Computer architecture Essay

Describe how analogue entropy arouse be converted and stored in computer systems Analogue data needs to be sampled in wander to be processed by a computer. As computers deal in Ones and Zeros it toilet only usher specific intervals. For example, when recording a weighty that gradually gets louder over a minute, a digital recording could record the level of sound both second, tho would lose the information between seconds. If the sound was sampled every half(prenominal) second, there would be half as much information confounded from the original source, but file size would be doubled.This is the trade arrive at that has to be do between file size and quality. Bit knowledge is the number of bits of information recorded per second . The higher the bit attainment means, the higher the sample dictate and this results in higher quality sound file. A good example of bit depth is in CD quality audio which has a bit depth of 16 bits and a sample rate of 44. 1 kHz. parturiency 3 (P5) Describe the winder comp peerlessnts of a computer architecture and how they interact 1. information Buffer this is a region of reminiscence used to temporarily hold data duration it is being moved from one place to an other.2. Accumulator A An 8 bit CPU has 1 register called the accumulator, this holds temporary data e. g. the defend- come out when you do leadition. 3. Arithmetic Logic Unit (ALU) this is the workhorse of the CPU because it carries out all the calculations. 4. Data private instructores the mechanism that moves information around a computer. 5. Address Buffer this holds the send for part of the dictation register, 6. Program Counter this contains the location of the next commission to be executed and, therefore, suffers track of where the computer is up to in a program. 7.Instruction Register (IR) this divides the information it obtains into twain fields. One field in the IR contains the operation code that tells the CPU what operation is to be carried out. The other field, called the operand field, contains the address of the data to be used by the instruction. 8. Condition legislation Register (CCR) this takes a snapshot of the subject of the ALU after each instruction has been executed and records the state of the carry, negative, zero, and overflow flag-bits. In the above diagram the flag-bits atomic number 18 H, I, N, Z, V & C. Task 4 (P6) Describe the features of a mainframe computer Multi-tasking.Multi-tasking is a method where multiple processes be dealt with at once sharing greenness processing recourses such as a CPU. It involves the CPU assigning which instructions to be carried out first but it only focuses on one instruction at a time. Pipelining Pipelining is a method in which the mainframe begins to execute a second instruction before the first has finished. every(prenominal) pipeline is divided into segments and each segment can be ran along side each other. When each segment completes its task it moves on to the next. amass (Level 1 and Level 2) roll up is a portion of memory made of high-speed static RAM (SRAM).As a result Cache memory is much more than efficient than the main memory (RAM) which is self-propelled RAM (DRAM) that runs slower but also cheaper. The lay aside is a smaller, double-quick memory which stores copies of the data from the most frequently used main memory locations. DRAM is dynamic in that, unlike SRAM, it needs to have its computer storage cells refreshed or given a new electronic institutionalize every few milliseconds. SRAM does not need refreshing because it operates on the ruler of moving current that is giveed in one of two directions rather than a storage cell that holds a charge in place.If the computer processor can find the data it needs for its next operation in cache memory, it will save time comp ard to having to get it from random rise to berth memory. Level 1 cache is normally built on to the processor chip. It is extensively used for all sorts of purposes such as data fetching, data shifting and data loops, storing only small amounts of data. Level 2 cache is normally located on the motherboard. L2 cache stores much more data, plan of attack usually from the L1 cache. L2 cache can be up to sixteen generation the size of L1 cache this also means that it takes up much more room so it has to be located on the motherboard.Clock order The quantify rate is the speed at which a processor quantify oscillates constantly from a one to a zero, this is measured in hertz. The clock rates speed is determined by an oscillator crystal and amplifier duty tour at bottom a clock generator tour. The limiting factor of the clock rate is the time it takes for the signal line to settle down from its on state to off state. The Clock rate is also as fast as L2 cache. Task 5 (P7) Describe the operation of system of logic supply use truth tables NOT AND (2 stimulations) OR (2 inputs) Consider how these thre e main admittances can be combined.NOR (2 inputs) NOT Logic Gate also know as (Inverter) The rig is true when only one input is false. Otherwise, the payoff is false. A Not approach is a logic gate which reverses the state of the input. AND Logic Gate The output is true when both inputs are true. Otherwise, the output is false. OR Logic Gate The output is true if each one or both of the inputs are true. If both inputs are false, past the output is false. These three main logic gates can be used to make other possible combinations of logic gates such as a NOR gate. NOR Logic Gate.The NOR gate is a combination of an OR gate followed by an inverter. The output is true if both inputs are false. Otherwise, the output is false. Task 6 (M1) Explain employ examples how data travels around the processor Task 7 (M2) Create logic circuits using dim-witted logic gates and provide truth tables This is a circuit that shows binary addition. here(predicate) are a few examples of th e circuit being carried out. The Red stage set/circles show input and Green circle/circles show output data This can be shown in the truth tables below. Task 8 (M4) contribute a description of both astable and bistable summerset- tears.A flip-flop is an electrical circuit that can be in one of two states. Astable flip flop Astable flip flop is an oscillator which regularly switches states all the time. It has one 1 input and 1 Output. It can be used as a clock. Bistable flip flop Bistable flip flop is a memory device/gate which keeps one state indefinitely while it has power it also has 2 inputs and 2 outputs. The difference between An Astable and Bistable flip flops. A bistable flip-flop is a multivibrator with two stable states and can be put into either of its two states and it will stay like that. An example of this could beA impartial light switch turn it on, it stays on, turn it off, it stays off. Task 9 (D1) Create complex logic circuits made up of arrays of simple logic circuits. To produce an addition of two numbers each of quaternion bits in length we must first. You can add two numbers in concert each quaternruple bit in length by extending the first wax adders carry out to another full adder and so on. Until you get 4 full adders each following on from the start carry out. The way a full adder works The circuit adds two bits Input A and Input B, taking into account the preceding(prenominal) carry in, to give the Sum, and the carry out.Now we know how a full adder works we can now relate this to the idea of 4 full adders joined together by the last carry out and the diagram below illustrates this. Diagram 1 These diagrams (below) will show you how you can add two four bit binary numbers together using a logic circuit. Example 1 Binary 1111+ 1111 ______ 11110 These binary numbers with value of 1 stand for both switches (The inputs i. e. the two four bit numbers added together) and the sum which in this case are shown by the flashing of LED lights (The sum is the output). 0 means no switch or light is active.The first line of inputs for this study will eternally be A4,A3,A2,A1 The second line of inputs for this study will always be B4,B3,B2,B1 these two numbers will be added together Then it is a long unders centre followed by Carrys C3,C2,C1 directly underneath And then in the end the output sum shown as O Task 10 (D2) equation and contrast two different processors I will compare the AMD Opteron four loading and the Intel core 2 quad processor q9650.AMD Opteron quad core 64-bit Computing Yes L2 cache 512kb x4 L3 cache 2mb Clock amphetamine 2. 1Ghz Special Features quick Virtualization index AMD Smart incur Technology wait Side good deal (FSB) pelt along 2000Mhz Watts 45 Price i 165 new Intel core 2 quad processor q9650 64-bit Computing Yes L2 cache 12mb Clock Speed 3Ghz Special Features Intel Virtualization Technology Enhanced Intel SpeedStep Technology Front Side Bus (FSB) Speed 1533Mhz.Watts 65 Price i 2 23 new Key components Front Side Bus The Front Side Bus allows the components to send and receive data from the CPU to the North Bridge and vise versa. The faster a computers bus speed, the faster it will operate, but a fast bus speed cant make up for a slow Clock Speed. Clock Speed The Clock Speed is the speed at which a microprocessor executes instructions these clock cycles per second are measured in hertz. Special Features Virtualization -Virtualization also known as a virtual machine makes it possible to run multiple operating systems on one computer.SpeedStep Technology SpeedStep Technology is built into some new Intel processors this can be used to change the clock speed by using a piece of software. Speed Step Technology allows the processor to keep up with performed operations. It greatly reduces power consumption and heat loss. Smart Fetch Technology Smart Fetch Technology allows the processor core to venture a halt state and draw less power, which reduces CPU power c onsumption. Recommendation twain processors have Quad-Core technology and 64 bit computing, nonetheless the difference is in the Clock speed, Cache memory and the extra features.Both processors have similar special features such as the AMD Rapid Virtualization Indexing and the Intel Virtualization Technology. Although the Intel core 2 quad processor q9650 has no L3 cache I think that the higher clock speed and L2 cache more than makes up for not having any L3 cache. Not to mention the Intel core 2 quad processor q9650 has Speed Step Technology which makes for a much greater performance. The Intel core 2 quad processor q9650 is more expensive but it is a price worth paying for such a greater performance.